Volt-ampere device



April 7, 1970 R. T. BYERLY E AL' 3,505,505

VOLT-AMPERE DEVICE Filed Oct. 22, 1965 as I I 5| 5| 5| I F|G.l. [I 3- X FIGS.

0 i a a 5 x OR KWH X|COUNTER 2| WITNESSESI F l G. 2. m To (fi 6Q Richard I. Byer ly and Mug 8 A John Kos1olos,Jr..

J fl WM ATTORNEY United States Patent 3,505,505 VOLT-AMPERE DEVICE Richard T. Byerly and John Kostalos, Jr., Pittsburgh, Pa., assignors to Westinghouse Electric Corporation, Pittsburgh, Pa., a corporation of Pennsylvania Filed Oct. 22, 1965, Ser. No. 501,238 Int. Cl. G061? 15/20; G01r 7/00 US. Cl. 235-15131 10 Claims ABSTRACT OF THE DISCLOSURE This invention relates to electrical measuring instru ments and in particular to instruments for determining the volt-amperes in an electrical circuit.

As is well known in the electrical industry the current which electrical public utilities may be called upon to supply to a customer may be considered to comprise two components, a watt component in phase with the line voltage, and a wattless, or reactive, component in quadrature therewith. When a watt meter or watthour meter measures the input at the customers premises, the Watt component alone is registered, and the reactive component, no matter how large, is not accounted for. Particularly in the case of large customers, leaving the reactive current out of account Would place a heavy burden on the utility, since both watt and wattless components play a part in determining the size and expense of electric generators and other elements in the utilitys system. Hence many utilities now install at many points on their systems, for example the premises of a large customer, in addition to kilowatt hour (i.e. KWH) meters which account for watt current, other meters called reactive kilovolt ampere hour (i.e. KVARH) meters which account for reactive current.

In accordance with the invention first pulses x are produced representatives of KWH and second pulses x are produced representative of KVARH in a conventional manner. Thus, each first pulse x represents a predetermined value of KWH and each second pulse x represents a predetermined value of KVARH. For present purposes it will be assumed that each pulse x and x represent one KWH and one KVARH respectively. Pursuant to the invention these pulses are logically examined and any combination of first and second pulses corresponding to, or approximately corresponding to, a predetermined value of /x +x or KVAH then produces a third pulse. The third pulses then may be counted for any desired period to indicate KVAH for such period. Turning now to FIG. 1 which is a vector diagram showing x or KWH plotted as abscissa and x or KVARH plotted as ordinates, vertical lines are drawn for each integral value which x may take and horizontal lines for each corresponding value of x Thus combinations of x, and x are represented by the various intersections of abscissa and ordinates up to limits of 5. It will be noted that such intersections which lie at a vector distance from the origin 0 equal to /x +x lie at the vector distance of exactly for x x coordinate pair combinations 0, 5; 3, 4; 4, 3 and 5, 0; that the pairs 1, 5 and 5, 1 intersections have vector distances equal to /2 6 which exceeds 5 by only 0.10; and

that for the pairs 5, 2 and 2, 5 the value of /x +x /2S differs from 5 by 0.39.

Many purposes of utilities will be sufiiciently servec by data having the precision of the foregoing figures and this offers the possibility of using a reporting de vice which emits an output signal, e.g. an electric pulse every time an x x pair has any of the values listed ir the preceding paragraph. Even for purposes where tht error due to the x x pair combinations 5, 2 and 2, 5 would be too great to tolerate, an arrangement sending out a signal for occurrence of any pair except 5, 2 and 2, f and provided with means for correcting the error due tc the latter, would be useful.

The present invention comprises an arrangement fol effecting such purposes. Each output pulse would ther represent /x +x =5 KVAH, and may report to 2 central ofiice the KVAH flow at the location of the KWI-I and KVARH meters.

One object of this invention is accordingly to derivr separate electric pulses respectively indicative of the KWH and the KVARH passing a point in a power sys tem and to derive logically the KVAH represented there by.

Another object is to receive separate electric signal: respectively indicative of the power and the reactivt power passing a point in an electric circuit and to registe: a quantity proportional to the product of potential, cur rent and time corresponding thereto.

Another object is to receive separate electric signal: respectively proportional to the Watt current and th: wattless current passing a point in an electric circui and to register a quantity proportional to the resultan current corresponding thereto.

Still another object is to receive separate electric signals respectively indicative of the Watt current and th wattless current passing a point in an electric networl during a predetermined time and to record a quantity indicative of the resultant current corresponding thereto A further object is to provide a comparatively inex pensive and effective apparatus for reporting the KVAI- of an electric circuit when furnished with binary-numbe. reports of KWH and KVARH.

These and other objects of this invention will be eviden upon reading the following description taken with th drawings in which is:

FIG. 1 is a vector diagram used in explaining thi: invention;

FIG. 2 is a schematic diagram of circuits in whicl the invention may be embodied; and

FIG. 3 is a schematic diagram of one AND gatr suitable for use in the network of FIG. 2.

FIG. 1 having already been discussed in detail, FIG 2 will next be described. A kilowatt hour (KWH) mete: 10, and kilovolt-reactive ampere hour (KVARH) mete] 11 located together at any desired point on an alternating current electric circuit, such as an electric power system are connected by input lines or by carrier or radio chan nels 12 and 13, to certain members of a plurality o: twelve AND gates A1 to A12, as shown in FIG. 2. The line 13 is first connected to the input of a 1 bit-unit (a bistable element e.g. a flip-flop 14) of a first binary counter having a 2 bit-unit 15, and a 4 bit-unit 16. Suck counters are too well known to require detailed descrip 3 of KVARH that has flowed. The reading or output signal of bit-unit 14 at any time may be called ul; that of 15 may be called 2, and that of 16 may be called 4. Similarly the readings or output signals of bit-units 17, 18 and 19 may be called v1, v2 and v4.

Thus the first binary counter 14, 15, 16 and the second binary counter 17, 18, 19 each consists of a three-stage binary computer with the output terminals of the stages ul, a2, M4 for the first binary counter and v1, v2, v4 for the second binary counter collectively presenting the number of pulses x or x applied to the input of the associated counter.

FIG. 3 shows a 3-input AND" gate which may be taken as typical, except for the number of inputs, of all the twelve AND gates mentioned above. That of FIG. 3 is the AND gate All but it is believed that a detailed description of this will suflice to show how the other AND gates are made up. Each AND gate input-lead contains a diode 51, the inner terminals of these being joined through a common junction and a common resistor 52 to the positive terminal of a source of voltage (not shown) having its negative terminal grounded. The aforeside common junction in the AND gate is connected to an output-lead 54. The input leads on AND gate All are respectively connected to input channel 13 carrying KVARH signal pulses x bit-unit 16 carrying output a4, and bit-unit 18 carrying output v2. Thus when, and only when, x a4 and v2 all carry voltage will AND gate A11 open and transmit a voltage to its output lead 54. Such output voltage passes through an OR gate 20 and its output lead 21 to the set terminal of a bistable element (eg, a flip-flop) 22 which produces a voltage on its output W only when set. Output W is connected to one input of each of AND gates A7, A8, A9 and A10 which thus are closed against current flow except when bistable 22 is in its set condition. Likewise AND gate A12 has its 3 input leads connected respectively to the line 12 carrying KWH signal pulses x bit-unit 15 carrying output a2 and bit-unit 19 carrying output v4. The AND gate A12 output transmits voltage through OR gate 20 and lead 21 to put bistable element 22 in set condition. All and A12 hold AND gates A7, A8, A9, and A10 closed against current flow to their output leads 23, 24, 25, 26, 27, 28, 29 and 31 except at times where three voltages x a4, v2 or x 142, v4 are all present.

Referring still to FIG. 2, the AND gate A1 has its input leads connected to input channel 13 and to 4 bitunit output 16, and so is closed against current flow through its output lead 33 to OR gate 34 except when x and a4 apply voltage to such AND gate. The result of this is that when the 4 bit-unit 16 stands energized to carry an output voltage by the previous arrival of 4 signal pulses from KVARH meter 11, the arrival of another signal pulse x from that meter, thereby completing the energization of the AND gate A1 by the combination x u4, causes an output pulse flow through OR gate 34 to its output channel 35, where it signals the passage at the metering point of KVAH corresponding to five pulses x In similar wise the AND gate A2 has its two inputs connected against current flow through its output-lead 36 unless a KWH pulse arrives over input channel 12 at a time when 4 previously arriving pulses have energized 4 bit-unit 19. Upon that happening current can flow through output lead 36-, OR gate 34 and output channel 35 to signal passage of KWH corresponding to five pulses x Reference to FIG. 1 will show that presence of voltage on 4 bit-unit 16, signifying previous arrival of 4 pulses from KVARH meter 11, can occur when x =4 and x the number of pulses received from the KWH meter 10, is and also when x =1. In the first case, arrival of another KVARH signal-pulse, the th, jumps the network status on the how diagram of FIG. 1 straight up along the x axis from 0, 4, to 0, 5 so that the latter point corresponds to emission of a KVAH signal over output channel 35. Similarly presence of voltage on bit-unit 1 oneill) sponding to previous flow of 4 KWH units, may occur at either of FIG. 1 intersections 4, 0 or 4, 1 and in the first case arrival of a 5th KWH input pulse x jumps the status along the x axis from 4, 0 to 5, 0. But if, when the status of the network is represented by l, 4 in FIG. 1, a 5th KVARH pulse arrives the network status will jump to intersection l, 5. This status corresponds to passage at the metering point of As previously pointed out this diifers from 5 by an amount so small that, for many purposes, the discrepancy may be disregarded, and the status may be registered as 5 KVAH.

Similar considerations apply to treating the jump in system status from 1 when a 5th signal pulse arrives from the KWH meter, as indicative of 5 KWH pulses passing the metering point. In summary, the gates A1 and A2 operate Whenever the fifth pulse of One of the trains of pulses x or x is received after the counters are reset, without regard to the other of the trains of pulses x or x Therefore AND gate Al, serves to send out over output channel a KVAH signal when the system status is represented by either 0, 4 or 1, 4 and a 5th KVARH signal pulse x arrives. AND gate A2 similarly correctly reports a system of either status 4, 0 or 4, 1 plus arrival of another x pulse.

It will readily be seen that the system status must always be represented by one or another intersection of the abscissas and ordinates in FIG. 1; that the arrival of a KWH signal-pulse will always result in a jump of one' integer magnitude along the abscissa x and arrival of a KAVRH pulse will produce a one-integer jump along an ordinate x Thus, for example, when the system status is 0, 4 a KWH pulse over input channel 12 may be the next to arrive from the metering point, resulting in a jump to system status 1, 4; but this will result in a KVAH value of only which is so far removed from a value of 5 as not to warrant, for some utilitys purposes, an output channel pulse recording of KVAH. This is in clear contrast to the eifect of arrival of a KVARH pulse when the same system status 0, 4 exists, as has just been explained. Similar contrast is seen between the effects of the receipt of a KVARH signal pulse, and receipt of a KWH pulse, when the system status is 4, 0.

Examination of FIG. 1 will now show that, when the system status is represented by intersection 3, 3 arrival of a KWH signal pulse x will cause a jump to intersection 4, 3 which corresponds exactly to a KVAH pulse value of atnd so warrants sending out a signal pulse over output channel 35. Similar considerations as to the receipt of a KVARH pulse x when the system status 3, 3 exists warrant sending out a KVAH signal over that output channel.

AND gates A3 and A4 function respectively, when the system has the 3, 3 status, to send out a KVAH signal over output channel 35 upon receipt of a KWH signal x or a KVARH signal x When status 3, 3 exists counter bit-units 14 and 15 will stand energized to indicate u=3 (i.e. binary number 011), and bit-units 17 and 18 stand energized to represent v=3. Arrival of a KWH signal pulse x over input channel 12 will then complete the opening of AND gate A3, and send a signal pulse out through OR gate 34 over output channel 35 indicating jump of the system to status 4, 3 in FIG. 1 or a value of one KVAH pulse.

For similar reasons arrival of a KVARH pulse x over input channel 13 would have jumped the system status in FIG. 1 to 3, 4 and have completed the opening of AND gate A4 to send out an output KVAH pulse. The curve 36 in FIG. 1 is, of course, the locus of system conditions where KVAH=5 in the unit system of x and x The AND gates A1 to A4 are thus seen to cause emission of an output signal over channel 35 whenever a pulse signal arrives over a suitable input channel when the system stands at any of the intersections 0, 4; 1, 4; 3, 3; 4, l or 4, in FIG. 1. The only other intersections within a single jump distance of the KVAH locus 36 are 2, 4 and 4, 2. Arrival of a KVARH pulse x with system in status 4, 2 will jump the system to intersection 4, 3 on locus 36, and warrant the emission of an output signal KVAH pulse. But arrival of an input signal x would jump the system from status 4, 2 to status 5, 2 having a position outside the locus 36. The resulting error may be acceptable in some applications.

For analogous reasons arrival of an input pulse x when the system status is represented by intersection 2, 4 would jump the status to intersection 3, 4 directly on the locus 36 and warrant sending out a KVAH output pulse; but arrival of an input pulse x would jump the system upward in FIGURE 1 from status 2, 4 to intersection 2, a point which could not accurately be reported by an output pulse. The AND gates A6 and A5 respectively cause emission of an output signal upon arrival of an input signal x from KVARH meter 11 when system status is at intersection 4, 2 and upon arrival of input pulses x when system status is 2, 4. Thus AND gate A5 has three inputs two of which are derived from bit-units 18 (i.e. v2) and 16 (i.e. 114); and arrival of an input KWH pulse x will then open the entire gate and send an output pulse via OR gate 34 out over output channel 35.

Likewise AND gate A6 has two inputs which are derived from bit-units (i.e. H2) and 19 (i.e. v4); and arrival of an input KVARH pulse x will then open the entire gate to pass an output pulse via OR gate 34 out over channel 35.

Thus AND gates A1 to A6 take care of reporting KVAH pulses for all conditions of the system except arrival of a KWH input pulse x when system status is intersection 4, 2 and arrival of a KVARH pulse x when system status is 2, 4; in FIG. 1. The above-described operation of these AND gates may be summarized as follows:

TABLE I Terminals AND gate: bearing voltage A1 x a4 A2 x v4 A3 x ul, 112, v1, v2

A4 x ul, 142, v1, v2

A5 x 114, v2

A6 s x 112, v4

Reporting output for the above-excepted two system conditions is the function of AND gates A7 to A12. AND gate All has two inputs derived from counter bit-units 18 and 16 for a system status intersection 2, 4. At the beginning of any counting period the flip-flop 22 is so positioned that it impresses no energizing voltage on its output line W, and consequently AND gates A7 to A10 remain impervious to current from the counter bitunits 14 to 19 to which they are connected, and send no pulses to the output channel through their output lines 23 to 31. A jump to intersection 2, 4 can result from receipt of an x (i.e. a KWH) pulse from a system status 1, 4 but none of the AND gates A1 to A6 is opened thereby and so no KVAH pulse is sent out. A jump to intersection 2, 4 can result from receipt of an x (i.e. a KVARH) pulse when the system is at intersection 2, 3; but again none of the AND gates is opened to send a KVAH pulse to output channel 35, when AND gates A7 to A10 are closed by zero output on lead W. Arrival of a KVARH input pulse x will then be needed to jump to status 2, 5 and cause emission of a KVAH pulse.

But with AND gate A11 energized by arrival of an x pulse from KVARH meter 11 when system status stands at intersection 2, 4; AND gate All will be opened to pass a pulse through OR gate 20 and its output line 21 to flip-flop 22 and thus impress energizing voltage through its output line 23A to render AND gates A7 to A10 pervious to current from the counter bit-units 14 to 19 at any subsequent time while flip-fiop 22 stands set.

AND gate A12 functions similarly through flip-flop 22 upon arrival of an x pulse when bit-units 15 and 19 stand energized. Output channel 35 is connected by a lead 37 to the reset terminals of all the counter bit-units 14 to 19 so that the latter are all reset to zero by emission of a KVAH=5 signal pulse. This starts a new counting period, but this differs from the one so far described in that the AND gates A7 to A10 are pervious to current from certain of the bit-units 14 to 19. Thus the system status builds up in FIG. 1 until one of the following four intersections are reached (1) 1, 4; (2) 4, l; (3) 3, 2; (4) 2, 3. Upon arrival of a KWH pulse x under system status (1) thus causing a jump to status 2, 4; AND gate A7 passes a KVAH pulse through output channel 35, and a pulse through OR gate 38 to the reset terminal of flip-flop 22. This causes a resetting of counter bit-units 14 to 1'9, and also flip-flop 22 to their original conditions.

Similar results to those just described for (l) in the preceding paragraph are produced by AND gate A9 upon arrival of a KVARH pulse x under the status (2) 4, 1; i.e. a KVAH output pulse is sent over output channel 35, and a resetting pulse is sent to flip-flop 22 by arrival of pulse x jumping the system status to 4, 2.

If the system stands in status (3) 3, 2 arrival of an x input pulse jumps the system from that condition to status 4, 2 which causes AND gate A8 to send a KVAH pulse out via lead 25 and OR gate 34 to output channel 35, and a reset pulse to flip-flop 22 through OR gate 38 and lead 39.

Similarly arrival of a KVARH pulse x when the system status is (4) 2, 3; jumping system status to intersection 2, 4; causes AND gate A10 to transmit a KVAH pulse through its lead 31 and OR gate 34 to output channel 35, and a reset pulse over its lead 29 and OR gate 38 to flip-flop 22.

The four conditions (1), (2), (3) and (4) just discussed thus cause the AND gates A7 to A10 to send out KVAH signals Whenever the system jumps to either status intersection 4, 2 or 2, 4 as long as flip-flop 22 stands set, but change the system back to a condition in which jump to status 2, 5 or 5, 2 is required to send out such a signal when flip-flop 22 stands reset. The system is changed alternately from one of these conditions to the other by AND gates A11 and A12 with the result that in half its time periods it will under-report the actual KVAH and in the other half will over-report them where the status 2, 4 and the status 4, 2 are involved. In a long succession of KVAH cycles these under-reports and over-reports will average out to give a good enough approximation to true KVAH for most purposes.

The above-described actions of the AND gates A7 to A10 may be summarized as follows for the condition in which the flip-flop 22 is set:

TABLE II Terminals AND gate: bearing voltage A7 x v1, n4 A8 x v1, v2, u2 A9 x v4, ul A10 x v2, M1, 112

A system has thus been evolved using only well-known inexpensive circuit components and devoid of moving parts, which will report, by accumulating output signals, the KVAH of an electric system when furnished with the data on KWH meter and KVARH meter readings now customarily available.

In FIG. 1 the curve 36 representing the locus of points which should produce a KVAH pulse intersects the x axis at a point corresponding to five x pulses and the x axis at a point corresponding to five x pulses. This permits preferred embodiment to be used as represented by the )gical system of FIG. 2 which is relatively simple and ractical.

If desired the parameters may be so selected that the urve 36 intersects the axes x and x at points representig a different number of x and x pulses. This different umber may be a multiple of five or any other number. In ny case, logic is provided which produces a KVAH pulse then any combination of x and x pulses falls on the urve 36 or acceptably close thereto. When successive ombinations of x and x fall on opposite sides of the urve 36, the averaging techniques previously explained ray be employed.

As previously noted, the KVAH pulses supplied over 1e line 35 may be counted over any desired period by a uitable counting device 61 to indicate KVAH for such eriod.

What is claimed is:

1. In a measuring device for measuring the vector reultant of first and second vector components displaced 1 phase from each other by a predetermined angle and resent in an alternating-current electrical system in the arm of alternating quantities, first pulse means effective then energized from the electrical system for producing rst pulses at a rate dependent on the magnitude of the rst vector component, second pulse means effective when nergized from the electrical system for producing second ulses at a rate dependent on the magnitude of the second ector component, and counting means having reset termial means operable to a reset condition, said counting 168.118 having a pair of input terminal means respectively oupled to the outputs of the first and second pulse means, nd reset means coupled to the reset terminal means for perating the counting means to reset condition in reponse to outputs from the counting means upon the ocurrence following a reset operation of the counting means -f any of plural count combinations of first pulses and econd pulses which represent substantially a predeternined magnitude of the vector resultant.

2. A measuring device as claimed in claim 1 wherein he counting means comprises a first counter for counting he first pulses occurring after a reset operation, a second ounter for counting the second pulses occurring after a eset operation, and wherein said reset means includes ombining means coupled to the first and second counters or producing a reset pulse in response to the arrival of aid counters by operation of the first and second pulse 163115 at any of a plurality of difi'erent combinations of ounts of said first and second pulses, each of said cominations representing substantially said predetermined iagnitude of said vector resultant, said counting means eing operable to reset condition by said reset pulse.

3. A measuring device as claimed in claim 2 wherein ombining means includes means for determining first and econd combination of the counts of said first and second M1868 which differ by one of said pulses and which repreent respectively magnitudes of the vector resultant larger ,nd smaller than said predetermined magnitude for oper- .ting the counting means to reset condition alternately in esponse to occurrence of said first and second combinaions.

4. A measuring device as claimed in claim 1 wherein he first pulse means comprises a KWH pulse meter and he second pulse means comprises a KVARH pulse meter, ind said plural count combinations comprise the following iair combinations: K and 0, 5K and K and 4K and 3K; being an integer, said counting means starting a new :ounting cycle upon operation of the reset means.

5. The arrangement specified in claim 4 wherein an out- )ut signal is produced also every other time a pair comination 5K and 2K is received.

6. A measuring device as claimed in claim 4 wherein .aid counting means includes means for producing an outaut signal each time the respective pulse meters have proluced p ls s. in said pair c mbination nd said re e means causes said counting means to start a new counting cycle upon production of said output signal.

7. The arrangement specified in claim 6 wherein means are provided to produce an output signal also every other time that a pair combination 5K and 2K of said first and second pulses occurs.

8. The arrangement specified in claim 6 wherein said counting means comprises a first binary counter having bit units providing output signals of three binary orders, respectively a1, a2, a4, a second binary counter having bit units providing output signals of three binary orders, respectively v1, v2, v4, and AND gates connected to be closed against current flow except when output signals are present on the output terminals of said bit units listed in the following Table I, said first pulses and second pulses being output signals x and x respectively:

TABLE I AND gate: Output signals A]. x U4 A2 x :14 A3 x ul, ul, v1, v2 A4 x ul, 112, v1, v2 A5 2: 1:4, v2 A6 x a2, v4

an output signal line, the outputs of said AND gates being connected to said output signal line and also to said reset terminal means.

9. The arrangement specified in claim 8 wherein supplemental AND gates and a supplemental bistable element are provided, and wherein additional AND gates are provided connected to be closed against current flow except when energized by the output signals x a2, v4, or the output signals x u4, v2, the outputs of said additional AND gates being connected to energize the supplemental bistable element which impresses an output voltage which can open said supplemental AND gates which otherwise would be closed if voltage output signals are present on the output terminals listed in the following Table II, the outputs of the AND gates listed in Table II being connected to reset the supplemental bistable element and also to the output signal line:

TABLE II Supplemental AND gate: Output signals A7 x a4, v1 A8 x 142, v1, v2 A9 x 111, v4 A10 x ul, a2, v2

10. A measuring device as claimed in claim 1 wherein the reset means includes means responsive to first and second combinations of said first and second pulses which (litter by one of said pulses and which represent respectively magnitudes of the vector resultant larger and smaller than said predetermined magnitude for operating the counting means to reset condition alternately in response to occurrence of said first and second combinations.

References Cited MALCOLM A. MORRISON, Primary Examiner I. F. RUGGIERO, Assistant Examiner U.S. Cl. X.R. 

